HP OpenVMS Calling Standard
Table 5-3 Register Argument Signature Encodings
| Value |
Name |
Meaning1,2 |
|
0
|
RASE$K_RA_NOARG
|
Argument is not present
|
|
1
|
RASE$K_RA_Q
|
64-bit argument passed in an integer register
|
|
2
|
RASE$K_RA_I32
|
32-bit argument sign extended to 64 bits passed in an integer register
|
|
3
|
RASE$K_RA_U32
|
32-bit unsigned argument zero extended to 64 bits passed in an integer
register
|
|
4
|
RASE$K_RA_FF
|
F_floating argument passed in a floating-point register on Alpha or a
general register on I64 systems
|
|
5
|
RASE$K_RA_FD
|
D_floating argument passed in a floating-point register on Alpha or a
general register on I64 systems
|
|
6
|
RASE$K_RA_FG
|
G_floating argument passed in a floating-point register on Alpha or a
general register on I64 systems
|
|
7
|
RASE$K_RA_FS
|
S_floating argument passed in a floating-point register
|
|
8
|
RASE$K_RA_FT
|
T_floating argument passed in a floating-point register
|
|
9--15
|
|
Reserved for future use
|
Table 5-4 Function Return Signature Encodings
| Value |
Name |
Meaning1,2 |
|
0
|
PSIG$K_FR_I64
|
64-bit result in RetVal
or No function result provided
or First parameter mechanism used
|
|
1
|
PSIG$K_FR_D64
|
64-bit result with low 32 bits sign extended in RetVal and high
32 bits sign extended in RetVal2
|
|
2
|
PSIG$K_FR_I32
|
32-bit sign extended to 64-bit result in RetVal
|
|
3
|
PSIG$K_FR_U32
|
32-bit unsigned result (zero extended) in RetVal
|
|
4
|
PSIG$K_FR_FF
|
F_floating result in RetFlt
|
|
5
|
PSIG$K_FR_FD
|
D_floating result in RetFlt
|
|
6
|
PSIG$K_FR_FG
|
G_floating result in RetFlt
|
|
7
|
PSIG$K_FR_FS
|
S_floating result in RetFlt
|
|
8
|
PSIG$K_FR_FT
|
T_floating result in RetFlt
|
|
9, 10
|
|
Reserved for future use
|
|
11
|
PSIG$K_FR_FFC
|
F_floating complex result in RetFlt and RetFlt2
|
|
12
|
PSIG$K_FR_FDC
|
D_floating complex result in RetFlt and RetFlt2
|
|
13
|
PSIG$K_FR_FGC
|
G_floating complex result in RetFlt and RetFlt2
|
|
14
|
PSIG$K_FR_FSC
|
S_floating complex result in RetFlt and RetFlt2
|
|
15
|
PSIG$K_FR_FTC
|
T_floating complex result in RetFlt and RetFlt2
|
1For a more detailed description of these conversions, see
Section 5.2.4.
2The X_floating and X_floating complex data types do not
appear in this table because these types are not passed using the by
value mechanism (see Section 3.7.5.1 and Section 4.7.5.1).
5.2.4 Call Parameter PSIG Conversions
Note that for the purposes of translated images, an address on OpenVMS
Alpha or I64 is described using RASE$K_RA_I32 or
MASE$K_MA_I32 as appropriate.
5.2.4.1 Native-Alpha-to-Translated-VAX PSIG Conversions
A detailed description of the native-to-translated call conversions for
the PSIG$V_REG_ARG_INFO and the PSIG$V_FUNC_RETURN field values is
given in Table 5-5.
Table 5-5 Native-to-Translated Conversion of the PSIG Field Values
| Name |
Description |
| PSIG$V_REG_ARG_INFO Field Conversions |
|
RASE$K_RA_Q
|
The low-order 32 bits of the native integer register contents are used
to fill the first of two longword entries in the VAX formatted argument
list, while the high-order 32 bits are used to fill the second longword
entry. This counts as two arguments in the VAX formatted argument list.
|
RASE$K_RA_I32
RASE$K_RA_U32
|
The low-order 32 bits of the integer register contents are used to fill
one longword entry in the VAX formatted argument list passed to the
translated procedure. The high-order 32 bits are ignored. This counts
as one argument in the VAX formatted argument list.
|
|
RASE$K_RA_FF
|
The single-precision contents of a floating-point register are used to
fill one longword entry in the VAX formatted argument list passed to
the translated procedure. This counts as one argument in the VAX
formatted argument list. The Alpha store instruction STF (or an
equivalent sequence on Itanium systems) is used to place the
register contents into memory.
|
RASE$K_RA_FD
RASE$K_RA_FG
|
The double-precision contents of a floating-point register are used to
fill two longword entries in the VAX formatted argument list passed to
the translated procedure. This counts as two arguments in the VAX
formatted argument list. The Alpha store instruction STG (or an
equivalent sequence on Itanium systems) is used to place the
register contents into memory.
|
RASE$K_RA_FS
RASE$K_RA_FT
|
Undefined.
|
| PSIG$V_MEMORY_ARG_INFO Field Conversions |
MASE$K_MA_Q
MASE$K_MA_I32
|
These convert like the RASE$K_RA_Q and RASE$K_RA_I32 field conversions,
except that the native argument list entry is stored in memory (rather
than in a register).
|
| PSIG$V_FUNC_RETURN Field Conversions |
|
PSIG$K_FR_I64
|
The translated code is returning a 64-bit result split between VAX R0
and R1. The low-order 32 bits of R1 are shifted left and combined with
the low-order 32 bits of R0 to form the 64-bit result that is returned
to the native caller in RetVal.
|
|
PSIG$K_FR_D64
|
The translated code is returning a 64-bit result split between VAX R0
and R1. Both R0 and R1 are sign extended from 32 to 64 bits and
returned to the native caller in RetVal and RetVal2.
|
PSIG$K_FR_I32
PSIG$K_FR_U32
|
The translated code is returning a 32-bit result in VAX R0. R0 is sign
extended from 32 to 64 bits and returned to the native caller in
RetVal.
|
|
PSIG$K_FR_FF
|
The single-precision contents of the result in VAX R0 is loaded into
native register RetFlt.
|
PSIG$K_FR_FD
PSIG$K_FR_FG
|
The double-precision contents in VAX registers R0 and R1 are combined
and loaded into native register RetFlt.
|
PSIG$K_FR_FS
PSIG$K_FR_FT
|
Undefined.
|
|
PSIG$K_FR_FFC
|
The single-precision complex contents in VAX registers R0 and R1 are
loaded into native registers RetFlt and RetFlt2.
|
PSIG$K_FR_FDC
PSIG$K_FR_FGC
|
The translated code is returning a double-precision complex result
using the hidden first parameter method (by reference). The storage for
the result is allocated prior to the call and the address is passed as
the extra parameter. Upon return, the result is copied from the
temporary storage into the native floating-point return registers and
returned to the native caller.
|
PSIG$K_FR_FSC
PSIG$K_FR_FTC
|
Undefined.
|
In all 64-bit cases, the longword at the lower memory address forms the
earlier argument in the VAX formatted argument list. Also, for
single-precision floating-point types, the unused 32 bits of an native
64-bit argument list entry are undefined.
5.2.4.2 Translated-VAX-to-Native-Alpha PSIG Conversions
A detailed description of the translated-to-native call conversions for
the PSIG$V_REG_ARG_INFO and the PSIG$V_FUNC_RETURN field values is
given in Table 5-6.
Table 5-6 Translated-to-Native Conversion of the PSIG Field Values
| Name |
Description |
| PSIG$V_REG_ARG_INFO Field Conversions |
|
RASE$K_RA_Q
|
The contents of two successive longwords from the VAX formatted
argument list are combined to form a single quadword value that is
placed in an integer register. This counts as one argument in the
native argument list.
|
RASE$K_RA_I32
RASE$K_RA_U32
|
The contents of one longword entry from the VAX formatted argument list
is sign extended and placed in the integer register. This counts as one
argument in the native argument list.
|
|
RASE$K_RA_FF
|
A single longword entry from the VAX formatted argument list is used to
form a floating-point value in a floating-point register. This counts
as one argument in the native argument list. The Alpha load instruction
LDF (or an equivalent sequence on I64 systems) is used to
place the argument in the floating-point register.
|
RASE$K_RA_FD
RASE$K_RA_FG
|
Two longword entries from the VAX formatted argument list are combined
to form a single floating-point value in a floating-point register.
This counts as one argument in the native argument list. The Alpha load
instruction LDG (or an equivalent sequence on I64 systems) is
used to place the argument in the floating-point register.
|
RASE$K_RA_FS
RASE$K_RA_FT
|
Undefined.
|
| PSIG$V_MEMORY_ARG_INFO Field Conversions |
MASE$K_MA_Q
MASE$K_MA_I32
|
These convert like RASE$K_RA_Q and RASE$K_RA_I32 field conversions,
except that the native argument list entry is stored in memory (rather
than a register).
1
|
| PSIG$V_FUNC_RETURN Field Conversions |
|
PSIG$K_FR_I64
|
The native code is returning a 64-bit result in RetVal. The high
32 bits of RetVal are moved to the VAX R1 register and the low
32 bits of RetVal are moved to the VAX R0 register. The 64-bit
result is then returned to the translated caller in VAX R0 and R1.
|
|
PSIG$K_FR_D64
|
The native code is returning a 64-bit result split between
RetVal and RetVal2. Both are returned to the translated
caller in place.
|
PSIG$K_FR_I32
PSIG$K_FR_U32
|
The native code is returning a 32-bit result in RetVal. The low
32 bits of RetVal are returned to the translated caller.
|
|
PSIG$K_FR_FF
|
The single-precision result in native register RetFlt is
returned in the VAX register R0.
1
|
PSIG$K_FR_FD
PSIG$K_FR_FG
|
The double-precision result in native register RetFlt is
returned in VAX registers R0 and R1.
|
PSIG$K_FR_FS
PSIG$K_FR_FT
|
Undefined.
|
|
PSIG$K_FR_FFC
|
The single-precision complex result in native registers RetFlt
and RetFlt2 is returned in the VAX registers R0 and R1.
1
|
PSIG$K_FR_FDC
PSIG$K_FR_FGC
|
The native code is returning a double-precision complex result in the
native floating-point registers. The result is copied into the storage
given by the hidden first parameter passed by the translated caller.
|
PSIG$K_FR_FSC
PSIG$K_FR_FTC
|
Undefined.
|
1Note that for single-precision floating-point types, the
unused 32 bits of a native 64-bit argument list entry are undefined.
5.2.4.3 Native-I64-to-Translated-Alpha PSIG Conversions
Conversion of native I64 arguments and results and translated
Alpha arguments and results is trivial; it is concerned solely with
moving the already properly formatted data to the appropriate location
for the target environment.
5.2.4.4 Translated-Alpha-to-Native-I64 PSIG Conversions
Conversion of translated Alpha arguments and results and native
I64 arguments and results is trivial; it is concerned solely
with moving the already properly formatted data to the appropriate
location for the target environment.
5.2.5 Default Signature Information
Default signature information is defined for common special cases. Such
a default is a short-hand description that can always be represented
explicitly but may sometimes be more compact than the corresponding
explicit representation.
Translated VAX Image Calling a Native Alpha Procedure
- The number of parameters is taken from the count byte in the VAX
argument list
- All parameters (if any) are 32-bit sign extended (RASE$K_RA_I32 for
register arguments, MASE$K_MA_I32 for memory arguments).
- The function result (if any) is 32-bit sign extended
(PSIG$K_FR_I32).
Native Alpha Procedure Calling a Translated VAX Image
- The number of parameters passed is contained in the AI (R25)
register.
- The register parameters (if any) are described in the AI register.
- The memory parameters (if any) are 32-bit sign extended
(MASE$K_MA_I32).
- The function result (if any) is 32-bit sign extended
(PSIG$K_FR_I32).
Translated VAX or Alpha Image Calling a Native I64 Procedure
- The number of parameters is taken from the count byte in the VAX
argument list or the argument count in the Alpha AI register (R25) as
appropriate.
- All parameters (if any) are 32-bit sign extended (RASE$K_RA_I32 for
register arguments, MASE$K_MA_I32 for memory arguments).
- The function result (if any) is 32-bit sign extended
(PSIG$K_FR_I32).
Native I64 Procedure Calling a Translated VAX or Alpha Image
- The number of parameters is contained in the I64 AI (R25)
register.
- The register parameters (if any) are described in the AI register.
- The memory parameters (if any) are 32-bit sign extended
(MASE$K_MA_I32).
- The function result (if any) is 32-bit sign extended
(PSIG$K_FR_I32).
Chapter 6
OpenVMS Argument Data Types
This chapter defines the argument-passing data types that are used to
call a procedure for OpenVMS VAX, Alpha, and I64
environments. All features defined here apply to all OpenVMS systems
unless otherwise noted.
Each data type implemented for a high-level language uses one of the
following classes of VAX data types for procedure parameters and
elements of file records:
- Atomic
- String
- Miscellaneous
When existing data types fail to satisfy the semantics of a language,
new data types, including certain language-specific ones, are added to
this standard. These data types can generally be passed by immediate
value (if 32 bits or less), by reference, or by descriptor.
Each data type code presented in this chapter indicates a unique data
format. Use these encodings whenever you need to identify data types to
achieve greater commonality across user software.
The encoding given in Sections 6.1 and 6.2 can help
you to identify data types, such as in a descriptor. However, in
addition to their use in descriptors, these data type codes are also
useful for identifying VAX, Alpha, and I64 data types in
areas outside the scope of the calling standard. Therefore, each
data-type code indicates a unique data format independent of its use in
descriptors.
Some data types are composed of a recordlike structure consisting of
two or more elementary data types. For example, the F_floating complex
(FC) data type is made up of two F_floating data types, and the varying
character string (VT) data type is made up of a word (unsigned, WU)
data type followed by a character string (T) data type.
Unless stated otherwise, all data types in this standard represent
signed quantities. The unsigned quantities do not allocate space for
the sign; all bit or character positions are used for significant data.
6.1 Atomic Data Types
Table 6-1 shows how atomic data types are defined and encoded for
VAX, Alpha, and I64 environments.
Table 6-1 Atomic Data Types
| Symbol |
Code |
Name/Description |
|
DSC$K_DTYPE_Z
|
0
|
Unspecified
The calling program has specified no data type. The default argument
for the called procedure should be the correct type.
|
|
DSC$K_DTYPE_BU
|
2
|
Byte (unsigned)
8-bit unsigned quantity.
|
|
DSC$K_DTYPE_WU
|
3
|
Word (unsigned)
16-bit unsigned quantity.
|
|
DSC$K_DTYPE_LU
|
4
|
Longword (unsigned)
32-bit unsigned quantity.
|
|
DSC$K_DTYPE_QU
|
5
|
Quadword (unsigned)
64-bit unsigned quantity.
|
|
DSC$K_DTYPE_OU
|
25
|
Octaword (unsigned)
128-bit unsigned quantity.
|
|
DSC$K_DTYPE_B
|
6
|
Byte integer (signed)
8-bit signed two's complement integer.
|
|
DSC$K_DTYPE_W
|
7
|
Word integer (signed)
16-bit signed two's complement integer.
|
|
DSC$K_DTYPE_L
|
8
|
Longword integer (signed)
32-bit signed two's complement integer.
|
|
DSC$K_DTYPE_Q
|
9
|
Quadword integer (signed)
64-bit signed two's complement integer.
|
|
DSC$K_DTYPE_O
|
26
|
Octaword integer (signed)
128-bit signed two's complement integer.
|
|
DSC$K_DTYPE_F
|
10
|
F_floating
32-bit F_floating quantity representing a single-precision number.
|
|
DSC$K_DTYPE_D
1
|
11
|
D_floating
64-bit D_floating quantity representing a double-precision number.
|
|
DSC$K_DTYPE_G
|
27
|
G_floating
64-bit G_floating quantity representing a double-precision number.
|
|
+DSC$K_DTYPE_H
2
|
28
|
H_floating
128-bit H_floating quantity representing a quadruple-precision
number.
|
|
DSC$K_DTYPE_FC
|
12
|
F_floating complex
Ordered pair of F_floating quantities representing a
single-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
DSC$K_DTYPE_DC
|
13
|
D_floating complex
Ordered pair of D_floating quantities representing a
double-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
DSC$K_DTYPE_GC
|
29
|
G_floating complex
Ordered pair of G_floating quantities representing a
double-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
+DSC$K_DTYPE_HC
2
|
30
|
H_floating complex
Ordered pair of H_floating quantities representing a
quadruple-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
++DSC$K_DTYPE_FS
|
52
|
S_floating
32-bit IEEE S_floating quantity representing a single-precision
number.
|
|
++DSC$K_DTYPE_FT
|
53
|
T_floating
64-bit IEEE T_floating quantity representing a double-precision
number.
|
|
++DSC$K_DTYPE_FSC
|
54
|
S_floating complex
Ordered pair of S_floating quantities representing a
single-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
++DSC$K_DTYPE_FTC
|
55
|
T_floating complex
Ordered pair of T_floating quantities representing a
single-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
|
++DSC$K_DTYPE_FX
|
57
|
X_floating
128-bit IEEE X_floating quantity representing an extended-precision
number.
|
|
++DSC$K_DTYPE_FXC
|
58
|
X_floating complex
Ordered pair of X_floating quantities representing an
extended-precision complex number. The lower addressed quantity is the
real part; the higher addressed quantity is the imaginary part.
|
1While the calling standard supports the manipulation of
D_floating and D_floating complex data, compiled code support will
invoke conversion from D_floating to G_floating as needed for Alpha and
Itanium arithmetic operations, and conversion of G_floating
intermediate results back to D_floating when needed for stores to
memory or parameter passing. This allows D_floating data to be used in
Alpha and Itanium arithmetic operations without required source
changes but with results limited to G_floating precision.
2H_floating data is not supported for general use on OpenVMS
Alpha and I64 systems. However, conversion routines are
supplied to allow users to convert existing H_floating data to other
storage representations.
+OpenVMS VAX specific.
++OpenVMS Alpha and I64 specific.
|
