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HP OpenVMS Systems Documentation

HP OpenVMS System Analysis Tools Manual

2.7.2.3 Signal Array

The signal array appears somewhat further down the stack. This array comprises all longwords so that the structure is VAX compatible. A signal array describes the exception that occurred. It contains an argument count, the exception code, zero or more exception parameters, the PC, and the PS. Therefore, the size of a signal array can vary from exception to exception. Although there are several possible exception conditions, access violations are most common. Figure 2-3 shows the signal array for an access violation.

Figure 2-3 Signal Array

For access violations, the signal array is set up as follows:

Value	Meaning
Vector list length	Number of longwords that follow. For access violations, this value is always 5.
Condition value	Exception code. The value 0C ₁₆ represents an access violation. You can identify the exception code by using the SDA command EVALUATE/CONDITION_VALUE or SHOW CRASH.
Additional arguments	These can include a reason mask and a virtual address. In the longword mask if bit 0 of the longword is set, the failing instruction (at the PC saved below) caused a length violation. If bit 1 is set, it referred to a location whose page table entry is in a "no access" page. Bit 2 indicates the type of access used by the failing instruction: it is set for write and modify operations and clear for read operations. The virtual address represents the low-order 32 bits of the virtual address that the failing instruction tried to reference.
PC	PC whose execution resulted in the exception.
PS	PS at the time of the exception.

2.7.2.4 64-Bit Signal Array

The 64-bit signal array also appears further down the stack. This array comprises all quadwords and is not VAX compatible. It contains the same data as the signal array, and Figure 2-4 shows the 64-bit signal array for an access violation. The SDA SHOW STACK command uses the CHF64$ symbols listed in the figure to identify the 64-bit signal array on the stack.

Figure 2-4 64-Bit Signal Array

For access violations, the 64-bit signal array is set up as follows:

Value	Meaning
Vector list length	Number of quadwords that follow. For access violations, this value is always 5.
Condition value	Exception code. The value 0C ₁₆ represents an access violation. You can identify the exception code by using the SDA command EVALUATE/CONDITION_VALUE or SHOW CRASH.
Additional arguments	These can include a reason mask and a virtual address. In the quadword mask if bit 0 of the quadword is set, the failing instruction (at the PC saved below) caused a length violation. If bit 1 is set, it referred to a location whose page table entry is in a "no access" page. Bit 2 indicates the type of access used by the failing instruction: it is set for write and modify operations and clear for read operations.
PC	PC whose execution resulted in the exception.
PS	PS at the time of the exception.

2.7.2.5 Alpha Exception Stack Frame

Figure 2-5 illustrates the Alpha exception stack frame, which comprises all quadwords.

Figure 2-5 Alpha Exception Stack Frame

The values contained in the exception stack frame are defined as follows:

**Table 2-10 Alpha Exception Stack Frame Values**
Value	Contents
INTSTK$Q_R2	Contents of R2 at the time of the exception
INTSTK$Q_R3	Contents of R3 at the time of the exception
INTSTK$Q_R4	Contents of R4 at the time of the exception
INTSTK$Q_R5	Contents of R5 at the time of the exception
INTSTK$Q_R6	Contents of R6 at the time of the exception
INTSTK$Q_R7	Contents of R7 at the time of the exception
INTSTK$Q_PC	PC whose execution resulted in the exception
INTSTK$Q_PS	PS at the time of the exception (except high-order bits)

The SDA SHOW STACK command identifies the elements of the exception stack frame on the stack using these symbols.

2.7.2.6 I64 Exception Stack Frame

Figure 2-6 and Figure 2-7 illustrate the I64 exception stack frame.

Figure 2-6 I64 Exception Stack Frame

Figure 2-7 I64 Exception Stack Frame (cont.)

The values contained in the exception stack frame are defined in Table 2-11.

**Table 2-11 I64 Exception Stack Frame Values**
Field	Use
INTSTK$B_FLAGS	Indicates if certain registers have been saved.
INTSTK$B_PPREVMODE	Save interrupted context's PREVMODE.
INTSTK$B_PREVSTACK	Indicates which mode of stack (register and memory) we return to.
INTSTK$B_IPL	SWIS IPL state
INTSTK$L_STKALIGN	How much allocated on this stack for exception frame.
INTSTK$W_NATMASK	Mask of bits 3-9 of the exception frame address.
INTSTK$B_TYPE	Standard VMS structure type.
INTSTK$B_SUBTYPE	Standard VMS structure subtype.
INTSTK$L_TRAP_TYPE	Trap type.
INTSTK$Q_IIP	Interruption Instruction Pointer (CR19).
INTSTK$Q_RSC	Register Stack Control register.
INTSTK$Q_BSP	Backing store pointer.
INTSTK$Q_BSPSTORE	User BSP store pointer for next spill.
INTSTK$Q_RNAT	RNAT register.
INTSTK$Q_BSPBASE	Base of backing store for the inner mode.
INTSTK$Q_PFS	Previous function state.
INTSTK$Q_CONTEXT	Bookkeeping data for exception processing.
INTSTK$Q_AST_F12 through INTSTK$Q_AST_F15	F12 to F15 - temporary FP registers; sometimes saved by AST.
INTSTK$Q_FPSR	Floating point status register.
INTSTK$B_INTERRUPT_DEPTH	Interrupt depth.
INTSTK$Q_PREDS	Predication registers.
INTSTK$Q_IPSR	Interruption Processor Status (CR16).
INTSTK$Q_ISR	Interruption Status Register (CR17).
INTSTK$Q_CR18	Reserved control register.
INTSTK$Q_IFA	Interruption Fault Address (CR20).
INTSTK$Q_ITIR	Interruption TLB Insertion Register (CR21).
INTSTK$Q_IIPA	Interruption immediate register (CR22).
INTSTK$Q_IFS	Interruption Function State (CR23).
INTSTK$Q_IIM	Interruption immediate (CR24).
INTSTK$Q_IHA	Interruption Hash Address (CR25).
INTSTK$Q_UNAT	User NAT collection register.
INTSTK$Q_CCV	CCV register.
INTSTK$Q_DCR	Default control register.
INTSTK$Q_LC	Loop counter.
INTSTK$Q_EC	Epilogue counter.
INTSTK$Q_NATS	NATs for registers saved in this structure.
INTSTK$Q_REGBASE	Used to index into registers.
INTSTK$Q_GP	r1 - Used as global pointer.
INTSTK$Q_R2	r2 - temporary register.
INTSTK$Q_R3	r3 - temporary register.
INTSTK$Q_R4 through R7	r4 through r7 - preserved registers (not saved by interrupt).
INTSTK$Q_R8	r8 - return value.
INTSTK$Q_R9	r9 - argument pointer.
INTSTK$Q_R10	r10 - temporary register.
INTSTK$Q_R11	r11 - temporary register.
INTSTK$Q_SSD	For future use.
INTSTK$Q_R13	r13 - Thread Pointer.
INTSTK$Q_R14 through R31	r14 through r31 - temporary registers.
INTSTK$Q_B0	Return pointer on kernel entry.
INTSTK$Q_B1 through B5	b1 through b5 - Preserved branch registers (not saved by interrupt).
INTSTK$Q_B6	b6 - temporary branch register.
INTSTK$Q_B7	b7 - temporary branch register.
INTSTK$L_IVT_OFFSET	Offset in IVT.
INTSTK$Q_F6 through F11	f6 through f11 - temporary FP registers.

2.7.2.7 SSRVEXCEPT Example

If OpenVMS encounters a fatal exception, you can find the code that signaled it by examining the PC in the signal array. Use the SHOW CRASH or CLUE CRASH command to display the PC and the instruction stream around the PC to locate the exception.

The following display shows the SDA output in response to the SHOW CRASH and SHOW STACK commands for an Alpha SSRVEXCEPT bugcheck. It illustrates the mechanism array, signal arrays, and the exception stack frame previously described.

Example 2-1 SHOW CRASH

OpenVMS (TM) Alpha system dump analyzer
...analyzing a selective memory dump...

Dump taken on 30-AUG-2000 13:13:46.83
SSRVEXCEPT, Unexpected system service exception

SDA>  SHOW CRASH
Time of system crash: 30-AUG-1996 13:13:46.83


Version of system: OpenVMS (TM) Alpha Operating System, Version V7.3

System Version Major ID/Minor ID: 3/0


System type: DEC 3000 Model 400

Crash CPU ID/Primary CPU ID:  00/00

Bitmask of CPUs active/available:  00000001/00000001


CPU bugcheck codes:
        CPU 00 -- SSRVEXCEPT, Unexpected system service exception

System State at Time of Exception
---------------------------------
Exception Frame:
----------------
        R2  = 00000000.00000003
        R3  = FFFFFFFF.80C63460  EXCEPTION_MON_NPRW+06A60
        R4  = FFFFFFFF.80D12740  PCB
        R5  = 00000000.000000C8
        R6  = 00000000.00030038
        R7  = 00000000.7FFA1FC0
        PC  = 00000000.00030078
        PS  = 00000000.00000003

         00000000.00030068:     STQ             R27,(SP)
         00000000.0003006C:     BIS             R31,SP,FP
         00000000.00030070:     STQ             R26,#X0010(SP)
         00000000.00030074:     LDA             R28,(R31)
   PC => 00000000.00030078:     LDL             R28,(R28)
         00000000.0003007C:     BEQ             R28,#X000007
         00000000.00030080:     LDQ             R26,#XFFE8(R27)
         00000000.00030084:     BIS             R31,R26,R0
         00000000.00030088:     BIS             R31,FP,SP

   PS =>
         MBZ SPAL      MBZ    IPL VMM MBZ CURMOD INT PRVMOD
         0   00   00000000000 00  0   0   KERN   0   USER


Signal Array
------------
        Length = 00000005
        Type   = 0000000C
        Arg    = 00000000.00010000
        Arg    = 00000000.00000000
        Arg    = 00000000.00030078
        Arg    = 00000000.00000003
%SYSTEM-F-ACCVIO, access violation, reason mask=00, virtual address=0000000000000000,
   PC=0000000000030078, PS=00000003

Saved Scratch Registers in Mechanism Array
------------------------------------------
R0   = 00000000.00020000  R1   = 00000000.00000000  R16  = 00000000.00020004
R17  = 00000000.00010050  R18  = FFFFFFFF.FFFFFFFF  R19  = 00000000.00000000
R20  = 00000000.7FFA1F50  R21  = 00000000.00000000  R22  = 00000000.00010050
R23  = 00000000.00000000  R24  = 00000000.00010051  R25  = 00000000.00000000
R26  = FFFFFFFF.8010ACA4  R27  = 00000000.00010050  R28  = 00000000.00000000

CPU 00 Processor crash information
----------------------------------


CPU 00 reason for Bugcheck: SSRVEXCEPT, Unexpected system service exception


Process currently executing on this CPU: SYSTEM


Current image file: $31$DKB0:[SYS0.][SYSMGR]X.EXE;1


Current IPL: 0  (decimal)


CPU database address:  80D0E000


CPUs Capabilities:    PRIMARY,QUORUM,RUN

General registers:

R0   = 00000000.00000000  R1   = 00000000.7FFA1EB8  R2   = FFFFFFFF.80D0E6C0
R3   = FFFFFFFF.80C63460  R4   = FFFFFFFF.80D12740  R5   = 00000000.000000C8
R6   = 00000000.00030038  R7   = 00000000.7FFA1FC0  R8   = 00000000.7FFAC208
R9   = 00000000.7FFAC410  R10  = 00000000.7FFAD238  R11  = 00000000.7FFCE3E0
R12  = 00000000.00000000  R13  = FFFFFFFF.80C6EB60  R14  = 00000000.00000000
R15  = 00000000.009A79FD  R16  = 00000000.000003C4  R17  = 00000000.7FFA1D40
R18  = FFFFFFFF.80C05C38  R19  = 00000000.00000000  R20  = 00000000.7FFA1F50
R21  = 00000000.00000000  R22  = 00000000.00000001  R23  = 00000000.7FFF03C8
R24  = 00000000.7FFF0040  AI   = 00000000.00000003  RA   = FFFFFFFF.82A21080
PV   = FFFFFFFF.829CF010  R28  = FFFFFFFF.8004B6DC  FP   = 00000000.7FFA1CA0
PC   = FFFFFFFF.82A210B4  PS   = 18000000.00000000




Processor Internal Registers:


ASN  = 00000000.0000002F                     ASTSR/ASTEN =          0000000F
IPL  =          00000000  PCBB = 00000000.003FE080  PRBR = FFFFFFFF.80D0E000
PTBR = 00000000.00001136  SCBB = 00000000.000001DC  SISR = 00000000.00000000
VPTB = FFFFFFFC.00000000  FPCR = 00000000.00000000  MCES = 00000000.00000000

CPU 00 Processor crash information
----------------------------------


        KSP    = 00000000.7FFA1C98
        ESP    = 00000000.7FFA6000
        SSP    = 00000000.7FFAC100
        USP    = 00000000.7AFFBAD0

                No spinlocks currently owned by CPU 00

Example 2-2 SHOW STACK

SDA> SHOW STACK
Current Operating Stack (KERNEL):
                       00000000.7FFA1C78    18000000.00000000
                       00000000.7FFA1C80    00000000.7FFA1CA0
                       00000000.7FFA1C88    00000000.00000000
                       00000000.7FFA1C90    00000000.7FFA1D40
                SP =>  00000000.7FFA1C98    00000000.00000000
                       00000000.7FFA1CA0    FFFFFFFF.829CF010  EXE$EXCPTN
                       00000000.7FFA1CA8    FFFFFFFF.82A2059C  EXCEPTION_MON_PRO+0259C
                       00000000.7FFA1CB0    00000000.00000000
                       00000000.7FFA1CB8    00000000.7FFA1CD0
                       00000000.7FFA1CC0    FFFFFFFF.829CEDA8  EXE$SET_PAGES_READ_ONLY+00948
                       00000000.7FFA1CC8    00000000.00000000
                       00000000.7FFA1CD0    FFFFFFFF.829CEDA8  EXE$SET_PAGES_READ_ONLY+00948
                       00000000.7FFA1CD8    00000000.00000000
                       00000000.7FFA1CE0    FFFFFFFF.82A1E930  EXE$CONTSIGNAL_C+001D0
                       00000000.7FFA1CE8    00000000.7FFA1F40
                       00000000.7FFA1CF0    FFFFFFFF.80C63780  EXE$ACVIOLAT
                       00000000.7FFA1CF8    00000000.7FFA1EB8
                       00000000.7FFA1D00    00000000.7FFA1D40
                       00000000.7FFA1D08    00000000.7FFA1F00
                       00000000.7FFA1D10    00000000.7FFA1F40
                       00000000.7FFA1D18    00000000.00000000
                       00000000.7FFA1D20    00000000.00000000
                       00000000.7FFA1D28    00000000.00020000  SYS$K_VERSION_04
                       00000000.7FFA1D30    00000005.00000250  BUG$_NETRCVPKT
                       00000000.7FFA1D38    829CE050.000008F8  BUG$_SEQ_NUM_OVF
CHF$IS_MCH_ARGS        00000000.7FFA1D40    00000000.0000002C
CHF$PH_MCH_FRAME       00000000.7FFA1D48    00000000.7AFFBAD0
CHF$IS_MCH_DEPTH       00000000.7FFA1D50    FFFFFFFF.FFFFFFFD
CHF$PH_MCH_DADDR       00000000.7FFA1D58    00000000.00000000
CHF$PH_MCH_ESF_ADDR    00000000.7FFA1D60    00000000.7FFA1F00
CHF$PH_MCH_SIG_ADDR    00000000.7FFA1D68    00000000.7FFA1EB8
CHF$IH_MCH_SAVR0       00000000.7FFA1D70    00000000.00020000  SYS$K_VERSION_04
CHF$IH_MCH_SAVR1       00000000.7FFA1D78    00000000.00000000
CHF$IH_MCH_SAVR16      00000000.7FFA1D80    00000000.00020004  UCB$M_LCL_VALID+00004
CHF$IH_MCH_SAVR17      00000000.7FFA1D88    00000000.00010050  SYS$K_VERSION_16+00010
CHF$IH_MCH_SAVR18      00000000.7FFA1D90    FFFFFFFF.FFFFFFFF
CHF$IH_MCH_SAVR19      00000000.7FFA1D98    00000000.00000000
CHF$IH_MCH_SAVR20      00000000.7FFA1DA0    00000000.7FFA1F50
CHF$IH_MCH_SAVR21      00000000.7FFA1DA8    00000000.00000000
CHF$IH_MCH_SAVR22      00000000.7FFA1DB0    00000000.00010050  SYS$K_VERSION_16+00010
CHF$IH_MCH_SAVR23      00000000.7FFA1DB8    00000000.00000000
CHF$IH_MCH_SAVR24      00000000.7FFA1DC0    00000000.00010051  SYS$K_VERSION_16+00011
CHF$IH_MCH_SAVR25      00000000.7FFA1DC8    00000000.00000000
CHF$IH_MCH_SAVR26      00000000.7FFA1DD0    FFFFFFFF.8010ACA4  AMAC$EMUL_CALL_NATIVE_C+000A4
CHF$IH_MCH_SAVR27      00000000.7FFA1DD8    00000000.00010050  SYS$K_VERSION_16+00010
CHF$IH_MCH_SAVR28      00000000.7FFA1DE0    00000000.00000000
                       00000000.7FFA1DE8    00000000.00000000
                       00000000.7FFA1DF0    00000000.00000000
                       00000000.7FFA1DF8    00000000.00000000
                       00000000.7FFA1E00    00000000.00000000
                       00000000.7FFA1E08    00000000.00000000
                       00000000.7FFA1E10    00000000.00000000
                       00000000.7FFA1E18    00000000.00000000
                       00000000.7FFA1E20    00000000.00000000
                       00000000.7FFA1E28    00000000.00000000
                       00000000.7FFA1E30    00000000.00000000
                       00000000.7FFA1E38    00000000.00000000
                       00000000.7FFA1E40    00000000.00000000
                       00000000.7FFA1E48    00000000.00000000
                       00000000.7FFA1E50    00000000.00000000
                       00000000.7FFA1E58    00000000.00000000
                       00000000.7FFA1E60    00000000.00000000
                       00000000.7FFA1E68    00000000.00000000
                       00000000.7FFA1E70    00000000.00000000
                       00000000.7FFA1E78    00000000.00000000
                       00000000.7FFA1E80    00000000.00000000
                       00000000.7FFA1E88    00000000.00000000
                       00000000.7FFA1E90    00000000.00000000
                       00000000.7FFA1E98    00000000.00000000
CHF$PH_MCH_SIG64_ADDR  00000000.7FFA1EA0    00000000.7FFA1ED0
                       00000000.7FFA1EA8    00000000.00000000
                       00000000.7FFA1EB0    00000000.7FFA1F50
                       00000000.7FFA1EB8    0000000C.00000005
                       00000000.7FFA1EC0    00000000.00010000  SYS$K_VERSION_07
                       00000000.7FFA1EC8    00000003.00030078  SYS$K_VERSION_01+00078
CHF$L_SIG_ARGS         00000000.7FFA1ED0    00002604.00000005  UCB$M_TEMPLATE+00604
CHF$L_SIG_ARG1         00000000.7FFA1ED8    00000000.0000000C
                       00000000.7FFA1EE0    00000000.00010000  SYS$K_VERSION_07
                       00000000.7FFA1EE8    00000000.00000000
                       00000000.7FFA1EF0    00000000.00030078  SYS$K_VERSION_01+00078
                       00000000.7FFA1EF8    00000000.00000003
INTSTK$Q_R2            00000000.7FFA1F00    00000000.00000003
INTSTK$Q_R3            00000000.7FFA1F08    FFFFFFFF.80C63460  EXCEPTION_MON_NPRW+06A60
INTSTK$Q_R4            00000000.7FFA1F10    FFFFFFFF.80D12740  PCB
INTSTK$Q_R5            00000000.7FFA1F18    00000000.000000C8
INTSTK$Q_R6            00000000.7FFA1F20    00000000.00030038  SYS$K_VERSION_01+00038
INTSTK$Q_R7            00000000.7FFA1F28    00000000.7FFA1FC0
INTSTK$Q_PC            00000000.7FFA1F30    00000000.00030078  SYS$K_VERSION_01+00078
INTSTK$Q_PS            00000000.7FFA1F38    00000000.00000003
Prev SP (7FFA1F40) ==> 00000000.7FFA1F40    00000000.00010050  SYS$K_VERSION_16+00010
                       00000000.7FFA1F48    00000000.00010000  SYS$K_VERSION_07
                       00000000.7FFA1F50    FFFFFFFF.8010ACA4  AMAC$EMUL_CALL_NATIVE_C+000A4
                       00000000.7FFA1F58    00000000.7FFA1F70
                       00000000.7FFA1F60    00000000.00000001
                       00000000.7FFA1F68    FFFFFFFF.800EE81C  RM_STD$DIRCACHE_BLKAST_C+005AC
                       00000000.7FFA1F70    FFFFFFFF.80C6EBA0  SCH$CHSEP+001E0
                       00000000.7FFA1F78    00000000.829CEDE8  EXE$SIGTORET
                       00000000.7FFA1F80    00010050.00000002  SYS$K_VERSION_16+00010
                       00000000.7FFA1F88    00000000.00020000  SYS$K_VERSION_04
                       00000000.7FFA1F90    00000000.00030000  SYS$K_VERSION_01
                       00000000.7FFA1F98    FFFFFFFF.800A4D64  EXCEPTION_MON_NPRO+00D64
                       00000000.7FFA1FA0    00000000.00000003
                       00000000.7FFA1FA8    FFFFFFFF.80D12740  PCB
                       00000000.7FFA1FB0    00000000.00010000  SYS$K_VERSION_07
                       00000000.7FFA1FB8    00000000.7AFFBAD0
                       00000000.7FFA1FC0    00000000.7FFCF880  MMG$IMGHDRBUF+00080
                       00000000.7FFA1FC8    00000000.7B0E9851
                       00000000.7FFA1FD0    00000000.7FFCF818  MMG$IMGHDRBUF+00018
                       00000000.7FFA1FD8    00000000.7FFCF938  MMG$IMGHDRBUF+00138
                       00000000.7FFA1FE0    00000000.7FFAC9F0
                       00000000.7FFA1FE8    00000000.7FFAC9F0
                       00000000.7FFA1FF0    FFFFFFFF.80000140  SYS$PUBLIC_VECTORS_NPRO+00140
                       00000000.7FFA1FF8    00000000.0000001B

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